Data storage memory is one of the backbones of the modern information technology. Semiconductor memory in the form of Dynamic random-access memory (DRAM), Static random-access memory (SRAM) and flash memory has dominated the digital world for the last forty years. Comparing to DRAM based on transistor and capacitor above the gate of the transistor, SRAM using the state of a flip-flop with large form factor is more expensive to produce but generally faster and less power consumption. Nevertheless, both DRAM and SRAM are volatile memory, which means they lost the information stored once the power is removed. Flash memory on the other hand is non-volatile memory and cheap to manufacture. However, flash memory has limited endurances of writing cycle and slow write though the read is relatively faster.
MRAM is relatively a new type of memory technology. It has the speed of the SRAM, density of the DRAM and it is non-volatile as well. If it is used to replace the DRAM in computer, it will not only give “instant on” but “always-on” status for operation system, and restore the system immediately to the point when the system is power off. It could provide a single storage solution to replace separate cache (SRAM), memory (DRAM) and permanent storage (hard disk drive (HDD) or flash-based solid state drive (SSD)) on portable device at least. Considering the rapid growth of “cloud computing” technology, MRAM has a great potential and can be the key dominated technology in digital world.
MRAM stores the informative bit “1” or “0” into the two magnetic states in the so-called magnetic storage layer. The different states in the storage layer gives two distinctive voltage outputs from the whole memory cell, normally a patterned tunneling magnetoresistive (TMR) stack structure. The TMR stack structure provides a read out mechanism sharing the same well-understood physics as current magnetic reader used in conventional hard disk drive.
There are two kinds of mostly developed MRAM technologies based on the write process: one kind, which can be labeled as the conventional magnetic field switched (toggle) MRAM, uses the magnetic field induced by the current in the remote write line to change the magnetization orientation in the data stored magnetic layer from one direction (for example “1”) to another direction (for example “0”). This kind of MRAM has more complicated cell structure and needs relative high write current (in the order of mA). It also has poor scalability beyond 65 nm because the write current in the write line needs to continue increase to ensure reliable switching the magnetization of the magnetic storage layer because of the fact that the smaller the physical dimension of the storage layer, the higher the magnetic coercivity it normally has for the same material. Nevertheless, the only commercially available MRAM so far is still based on this conventional writing scheme. The other class of the MRAM is called spin-transfer torque (STT) switching MRAM. It is believed that the STT-RAM has much better scalability due to its simple memory cell structure. While the data read out mechanism is still based on TMR effect, the data write is governed by physics of spin-transfer effect. Despite of intensive efforts and investment, even with the early demonstrated by Sony in late 2005, no commercial products are available on the market so far. One of the biggest challenges of STT-RAM is its reliability, which depends largely on the value and statistical distribution of the critical current density needed to flip the magnetic storage layers within every patterned TMR stack used in the MRAM memory structures. Currently, the value of the critical current density is still in the range of 106 A/cm2. To allow such large current density through the dielectric barrier layer such as AlOx and MgO in the TMR stack, the thickness of the barrier has to be relatively thin, which not only limits the magnetoresist (MR) ratio value but also causes potential risk of the barrier breakdown. As such, a large portion of efforts in developing the STT-RAM is focused on lower the critical current density while still maintaining the thermal stability of the magnetic data storage layer.
More recently, a new class of MRAM cell design has been proposed using so-called spin-orbit torque interaction to flip the storage layer within a TMR stack (G. Yi et. al. US2013/0114334A1). The new class of MRAM cell is a three terminator device with separated write and read paths. The storage layer of the memory cell is sandwiched between a heavy metal layer and dielectric layer to facilitate spin-orbit torque.
The spin-orbit torque effects is capable of flipping magnetic layers with either perpendicular anisotropy or in-plane anisotropy film, which has been demonstrated in the literature (I. M. Miron et. al., Nature, vol. 476, 189, (2011). “perpendicular switching of a single ferromagnetic layer induced by in-plane current injection”; L. Liu et. al., Science vol. 336, 555, (2012), “Spin-torque switching with the giant spin Hall effect of Tantalum”.). However, when SOT effects are used to design magnetic memory cell, things are much more complicated than straight forward thinking.
First of all, the spin-orbit torque is an interfacial effect. Therefore, the thicker the storage layer, the higher the critical current density needed to flip the storage layer. As such, a thinner storage layer is much more desired from switching current density reduction point of view. Very unfortunately, as the size of the memory cell (i.e. the footprint of the storage layer: S) is reduced, with a thin storage layer (with thickness of t), the thermal stability of the storage layer is in serious doubt because of the thermal stability factor KV/kBT being proportion to the total magnetic volume of storage layer (K is magnetic anisotropy of storage layer, V=S*t is the volume of storage layer, kB is the Boltzmann, T is the temperature in absolute temperature unit).
For memory cell design based on perpendicular storage layer (or perpendicular TMR stack), even without considering the magnitude of current density for the SOT effect, the practical challenge is that, for available CoFexB20/MgO/CoFexB20 TMR stack showing high TMR ratio, once the thickness of the storage layer CoFexB20 is larger than ˜1.5 nm or slightly more, the orientation of its magnetization stays in-plane of film growth plane rather than much needed perpendicular pointing. In fact, from the literature, it is believed that the perpendicular magnetization of CoFexB20 layer is more repeatable when its thickness is around one nanometer.
The memory cell design based on an in-plane storage layer (or in-plane TMR stack) can have a thicker CoFexB20 storage layer for available CoFexB20/MgO/CoFexB20 TMR stack showing high TMR ratio. However, the in-plane TMR stack based MRAM cell design, in general, has its own unresolved issue, i.e., the magnetic interaction between the adjacent cells due to fringe magnetic field from the storage layers causing instability and wide spread of the switching current density variation. Moreover, the thicker the storage layer, the worse the magnetic interaction as well as the larger the critical current density needed for SOT to flip the storage layer.
It is well known that one of the biggest advantages of having a perpendicular TMR stack as a MRAM cell is to increase its magnetic stability by minimizing the magnetic interaction between the adjacent cells. This is very much similar to the advantages achieved when magnetic recording medium converted from the longitudinal magnetic medium to current perpendicular magnetic medium by eliminating the magnetic interacting between the adjacent bits. In other words, a perpendicular-TMR-stack based memory cell is preferred compared with in-plane-TMR-stack based design unless the magnetic interaction between the fringe field emitted from the storage layer of the in-plane-TMR-stack based memory cell can be mitigated.
In this disclosure, we provide novel SOT-MRAM cell designs to resolve the above mentioned issues of both perpendicular-TMR based cell and in-plane TMR based cell design for SOT-MRAM.